DCON26_PAPER_Track10_HowZeroBiasDiscreteTLVRMaximizesRevenueonProductBoards_33_66.pdf

1、 How Zero Bias Discrete TLVR Maximizes Revenue on Product Boards Ying Zhang,Bytedance,Ltd, Pengfei Cheng,Bytedance,Ltd, Gongshan Gu,Monolithic Power Systems, Ze Zhang,Monolithic Power Systems, Lijie Jiang,Monolithic Power Systems, Huaimin Li,Monolithic Power Systems, Wei Dai,Intel, Xiaoguo Liang,Int

2、el, Abstract Zero-Bias TLVR is a proposed modification of the standard TLVR topology designed to better utilize the TLVR magnetic structure.To achieve the higher efficiency,the selection of inductors and the PCB layout are two key points.First,this paper conducts a comparative analysis between discr

3、ete TL and group TL based on two major categories of copper loss and core loss,serving as the technical basis for inductor(component selection).Secondly,it provides systematic design guidelines for PCB layout to further minimize power loss in the printed circuit board,with a focus on optimizing elec

4、trical performance and thermal management.Additionally,during the design phase,simulations for IR drop,PDN(Power Distribution Network),and transient responses are conducted.Finally,PCB prototyping and physical testing are performed to verify the efficiency and dynamic performance of the proposed sol

5、ution.Notably,this solution represents the first power supply scheme utilizing ZB discrete TLVR as the product boards power source,paired with Intel DMR CPUs,and undergoes comprehensive VRTS(Voltage Regulator Thermal Solution)testing.Author(s)Biography Ying Zhang working as a SI/PI engineer in Byted

6、ance.Responsible for the self-developed server SI/PI architecture evaluation and cost optimization.Pengfei Cheng is a SI Engineer of Bytedance.He focuses on the high speed and power integrity in server over the last decade.Gongshan Gu is an application engineer in MPS(Monolithic Power Systems).He fo