DC25_SLIDES_Track05_InnovativeLayoutOptimizationMethodologyVia_Ilamparidhi_V2.pdf

1、Information Classification:GeneralWelcome to ConferenceJanuary 2830,2025Santa Clara Convention Center1ExpoJanuary 2930,2025Information Classification:GeneralInnovative Layout Optimization Methodology and Via Routing Pattern to Enable UCIe 36Gbps in Organic InterposerIlamparidhi I,(Alphawave Semi)Sur

2、iya Prakash T(Alphawave Semi)Yadavalli Jagadeeswari(Alphawave Semi)2Information Classification:GeneralImageSpeaker&AuthorIlamparidhi IPrincipal SI-PI Engineer,Alphawave S3Ilamparidhi I is a Principal SI-PI Engineer at Alphawave Semi with over 19 years of industry expertise in AnalogMixed Signal(AMS)

3、System Modelling&Optimization,Advanced Package Design&Optimization,and PCB design.He leads a technical team focused on developing next-generation Die to Die solutions for UCIe and HBM interfaces.He holds an MTech in Microwave and Photonics from the Indian Institute of Technology,Kanpur(IIT-K),and ha

4、sworked with leading companies such as Cisco,Seagate,Rambus,Xilinx,and Freescale Semiconductor.In the pastyear,he has driven key innovations at Alphawave Semi,resulting in the filing of 4 US patents(pending approval)related to Advanced package design and Analog Mixed Signal(AMS)system for high-perfo

5、rmance HBM and UCIetechnologies.Information Classification:GeneralImageCo-AuthorsSuriya Prakash T4Yadavalli JagadeeswariYadavalli.JYadavalli Jagadeeswari is an Advanced PackageDesign Engineer at Alphawave Semi with 3+yearsof expertise in HBM and UCIe.She specializes inlayout,3DEMextraction,andinnova

6、tionsinadvanced packaging,with one US patent(pendingapproval),and is pursuing an MTech at the IndianInstitute of Technology,Madras(IIT Madras).Suriya Prakash T is a Senior SI-PI Engineer atAlphawave Semi with 8+years of expertise in IP,advanced packaging,and PCB design.He specializesin Analog Mixed