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DC25_SLIDES_Track10_DeterminingTheRequirementsDievsPackage_Phillips_v02.pdf

2026-05-16
文档编号:1240883
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1、Information Classification:GeneralWelcome to ConferenceJanuary 2830,2025Santa Clara Convention Center1ExpoJanuary 2930,2025 Information Classification:GeneralDetermining the Requirements,Die vs.Package vs.Board:Multi-level Power Distribution Network DesignEthan Koether(Amazon)John Phillips,(Cadence)

2、,Shirin Farrahi(Cadence),Kristoffer Skytte(Cadence),Joseph Hartman(Oracle),Mario Rotigni(Retired),Istvan Novak(Samtec)2Information Classification:GeneralImageSPEAKERSEthan KoetherSr.Signal and Power Integrity Engineer,Amazon Project KuiperKEthan Koether earned his masters degree in EECS in 2014 from

3、 MIT then spent seven years as a hardware engineer at Oracle.He then joined Amazons Project Kuiper as a Sr.SIPI engineer.His interests are in commercial power solutions and power distribution network design,measurement,and analysis.3Information Classification:GeneralImageImage SPEAKERSKristoffer Sky

4、tteApplication Engineer Architect,CKristoffer Skytte has 20 years experience working on chip,package,board and full system analysis including SI,PI,thermal,and EMC challenges.His recent efforts are on examining differences between measurement and simulation.He holds an M.Sc.EE.degree from the Techni

5、cal University of Denmark.Shirin FarrahiSr.Principal Software Engineer,CShirin Farrahi is working on SI and PI tools for automated PCB design.Prior to joining Cadence,she spent four years as a Hardware Engineer in the SPARC Microelectronics group at Oracle.She received her Ph.D.in Electrical Enginee

6、ring from the Massachusetts Institute of Technology.4ImageImage John PhillipsSr.Principal Application Engineer,CJohn has 30+years experience working on SI,PI,and EMC challenges at the chip,board,and system level in applications including high-end computing and mil-aero.He holds an MSc.from Bolton Un

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