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DC25_SLIDES_Track6_DirectToSubstrateCPC_Krooswyk.pdf

2026-05-16
文档编号:1240892
文档页数:22
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1、Information Classification:GeneralWelcome to ConferenceJanuary 2830,2025Santa Clara Convention Center1ExpoJanuary 2930,2025 Information Classification:GeneralDirect to Substrate 200G-PAM4 Co-Packaged Connectors:Is it a Reality?Steve Krooswyk,SamtecJignesh Shah(Samtec),Evan Beauprez(Broadcom)Regee Pe

2、taja(Broadcom)2Information Classification:GeneralImageSPEAKERSSteve KrooswykSr SI Design,Samtecsteve.krooswyk samtecSteve is technical lead in Samtecs high speed connector and cable development group.His 20 years of experience includes a role as PCI Express lead in Intels Data Center Group,introduci

3、ng excursion metrics in the PCI-SIG,co-authoring High Speed Digital Design for High Speed Interconnects&Signaling,and an MS from U.of South Carolina.3Information Classification:GeneralSystem challenges are amplified more than ever Doubling of data rate Density Thermal Signal IntegrityWe desire to in

4、crease the#of I/O at the front and back of the chassis Data Center Connectivity 4Information Classification:GeneralAchieving the I/O needs through PCB routing is suffering a challenge:Long lengths to the front andor back mean higher losses Ultra-low loss material is 2x the loss from 26 to 53 GHz Agg

5、ressive surface roughness is required to further managethe losses Package core,solder ball,and escape via add reflection&crosstalk cannot be tolerated at longer lengths(worse SNR)On Board Limitations52.8dbinch1.4dbinchInformation Classification:General Co-Packaged connectivity presents an opportunit

6、y to reduce package vertical SI penalties The lower loss of cables and removal of package-related reflections allow an extended reach Channel models assembled below reveal the value add Solutions reached through loss budget trade off and preliminary COM simulation Channel Modeling w Copper DAC Cable

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