基于芯片级 3D-IC 的近内存处理.pdf
1、PROCESSING-NEAR-MEMORY WITH CHIP LEVEL 3D-ICMIAO LIUBRIAN LI ON BEHALF OF MIAO LIUMIAO LIU,DAVID WEI ZHANG,QINGQING SUNFUDAN UNIVERSITY,SHANGHAI,CHINAAGENDAIntroduction3DIC RoadmapSRAM-on-Logic Partitioning2D vs 3D Area BenchmarkingSRAM-on-Logic ImplementationSRAM-on-Logic AdvantageSRAM-on-Logic Cha
2、llengeConclusionINTRODUCTIONIssues:Solution Demo CaseMoore Law hard toproceedBandwidth demanding from AI/AutomotivePower limitationCost limitation3DICCA787nmSRAM&Logic Separation3D Implementation&SignOff3DIC ROADMAPFan-Out Wafer Level Package(FOWLP)3DIC ROADMAPChip-Level 3D:DRAM-on-Logic3DIC ROADMAP
3、Chip-Level 3D:SRAM-on-Logic3DIC ROADMAPTrendINFO/FOWLPDRAM-on-LogicSRAM-on-LogicLogic-on-Logic2018Mature technology in various applications2021Mining machine Chips2022Advanced Multi-Core CPU/XPU2024AI Chips3.5DSRAM-ON-LOGIC PARTITIONINGLogical PartitionSRAM-ON-LOGIC PARTITIONINGFeedthrough Insertion





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